Dubai, UAE: As the Middle East accelerates investment in artificial intelligence and the infrastructure needed to support it, Huawei has unveiled a new generation of AI computing technologies designed to address the growing demands of complex AI models.
Announced at Huawei Connect 2026 in Shanghai, the new technologies include the Atlas 960E, the industry’s first NPO-based SuperPoD, and Hi-ONE, which is the industry’s first mass-production-ready near-packaged optics (NPO) optical engine and the first with a built-in light source. Huawei also revealed that the development of its next-generation Ascend 960 AI chips is progressing ahead of schedule, as the company moves towards a one-generation-per-year chip development cycle.
The announcements come as AI infrastructure becomes a critical part of the Middle East’s technology ambitions. Governments and businesses across the region are moving beyond AI experimentation towards deployment at scale in line with national visions, driving demand for the computing capacity, energy efficiency and reliability needed to train and run sophisticated models.
Huawei’s latest infrastructure is designed for this next stage of AI development. Foundation models are rapidly approaching 10 trillion parameters, placing significantly greater demands on the systems that train and run them. Huawei expects models to exceed 100 trillion parameters by 2030.
Among Huawei’s key announcements at the event is the Atlas 960E SuperPoD, powered by the company’s UnifiedBus architecture and its new Hi-ONE optical engine. A single Atlas 960E can scale to 4,096 NPUs, delivering 8 EFLOPS of FP8 computing performance and 16 EFLOPS at FP4 precision, with up to 1 petabyte of HBM capacity.
The system incorporates 5,500 Hi-ONE units, removing the need for approximately 48,000 conventional 800G optical modules. Huawei says this reduces power consumption by more than 550 kilowatts, while doubling fault-free operating time and achieving 99.8% system availability.
Hi-ONE is also designed to improve the efficiency of high-speed optical interconnects as AI infrastructure expands. Its architecture reduces power consumption by approximately 66% and signal transmission latency by around 90%, while Huawei says its integrated design improves overall reliability by ten times.
“AI is advancing faster than any technological revolution we have seen before, and the demands it places on computing infrastructure are growing just as quickly. While models become larger and more complex, we need to rethink how computing systems are designed, connected and scaled. At Huawei, we are addressing this through continued innovation in systems and architecture, from chips and interconnects to SuperPoDs and SuperClusters, while making computing power more readily accessible. No single company can build an intelligent world alone, which is why we will continue to work with customers, partners and developers to build the foundations needed for this next stage of AI,” David Wang, Deputy Chairman of the Board and Rotating Chairman at Huawei, said.
Huawei also provided an update on its Ascend AI chip roadmap. Ascend 960DT is expected in the first quarter of 2027, three quarters ahead of the company’s original roadmap, followed by Ascend 960PR in the third quarter of 2027, one quarter ahead of schedule.
Huawei is moving to a one-generation-per-year development cycle, with Ascend 970 scheduled for 2028 and Ascend 980 for 2029. The company expects compute specifications to continue doubling with each generation.
“We’re evolving our Ascend chip series on a one-generation-a-year cycle,” Wang said. “Thanks to the Tau (τ) Scaling Law, not only will their compute specifications continue to double, but you can also expect to see huge improvements across the board in terms of memory bandwidth, memory capacity, interconnect bandwidth, and more.”
